Have you ever considered creating a modular FPGA-accelerated design with all the necessary bells and whistles, only to feel overwhelmed by the complexity and difficulties? It's not uncommon to worry that your draft specifications might be too narrow for the final version, or that certain decisions could limit your ability to adapt as requirements change.
On top of that, today's landscape introduces external demands for the core computing part, such as cybersecurity, application-related standards, limited power budgets, environmental challenges, and physical size constraints.
It’s undeniably challenging. But here’s the good news: standardized building blocks can help. These building blocks not only provide scalable, futureproof features for your design, but also help streamline lifecycle management, optimize total cost of ownership, and boost your ROI.
Take Computer-on-Modules (COMs), for example. These versatile components are available in different open standards and have been providing PC-like functionality for way more than 10 years, which is the typical lifespan of a dedicated CPU supported by a chip vendor. COM Express, for example, has been on the market for 20 years. So, by leveraging COMs, you can upgrade your applications with new processor generations simply by swapping out a module – no need to change your original design.
A Computer-on-Module pairs with a carrier board, which houses the customer-specific IP and necessary I/Os. Compared to a full custom-design, this COM-and-carrier approach simplifies development since the complex COM comes application-ready off-the-shelf.
What is more, modern multicore technology in these platforms enables hardware consolidation with the benefits of virtualization. On the software side, this approach supports common operating systems like Microsoft, various Linux distributions, and specialized options like VxWorks or QNX and many others.
For designs built from the ground up using discrete components, microcontroller-based SoCs are a typical choice for the CPU platform. However, these microcontroller type SoC’s come with fixed peripheral layout limiting your options. While SoCs are sometimes found on standard COMs, this single-chip approach falls short when it comes to scalability.
So, how do you bridge this gap? How do you add true scalability and create heterogeneous systems with multiple CPU architectures in a single platform? The answer lies in pairing an FPGA, mounted on the carrier, with a COM.
There are various options from well-known silicon vendors like AMD, Altera, and others. The capabilities of FPGAs are defined by parameters such as logic elements, memory, and DSP blocks, which determine how complex and extensive the configurable FPGA functionality can be. Silicon vendors also supply pre-designed IP blocks, or you can create custom functionality using a hardware description language of your choice (such as VHDL or Verilog).
Think of an FPGA as a blank canvas, waiting for you to draw the details of various interfaces, such as high-speed Ethernet, MIPI, LVDS, USB, and more. But the capabilities of FPGAs go far beyond interfaces – they can host multicore ARM CPUs, RISC-V implementations, DSP cores for AI/ML tasks, dedicated inference patterns, or even functional safety features like a safety island.
What is more, you can convert software code into hardware functionality and run it as an IP block within the FPGA. In some use cases, this approach delivers better energy efficiency, higher performance, and lower latency compared to running the same function on a CPU, or even a GPU. By combining a ready-made yet scalable COM with an FPGA on the carrier board, you achieve true design agility, security, and scalability. This approach allows you to define your system design through both hardware and software.
If you want to know more about these topics and get inspired by live implementations of some of the miracles you can create with this combination, the FPGA Forum in Trondheim, Norway, on February 5th and 6th is the perfect place to start your journey. I’ll be there alongside FPGA experts and would love to see you!
To get a head start, check out the following links:
